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  1 / 3 www.asb.co.kr aug ust 2011 p lerow tm aln1967t2 internally matched lna module the plerow tm ale - series is the compactly designed surface - mount module for the use of the lna with or without the following gain blocks in the infrastructure equipment of the mobile wire less (cdma, gsm, pcs, phs, wcdma, dmb, wlan, wibro, wimax), gps, satellite commun i- cation terminals , catv and so on. it has an exceptional performance of low noise figure, high gain, high oip3, and low bias current. the stability factor is always kept more than unity over the application band in order to ensure its unconditionally stable implementation to the application system environment. the surface - mount module package including the completed matching circuit and other components necessary just in case a llows very simple and convenient implementation onto the system board in mass production level. parameter unit specifications min typ max frequency range mhz 1960 1975 gain db 18.5 19.5 gain flatness db ? 0.1 ? 0. 2 noise figure db 0.65 0.7 output ip3 (1) dbm 29 30 s11/s22 (2) db - 20/ - 1 0 output p1db dbm 18 19 switching time (3) ? sec - supply current ma 8 0 1 0 0 supply voltage v 5 impedance ? 50 max. rf input power dbm c.w 29~31 (before fail) package type & size mm surface mount type, 10wx10lx3.8h operating temperature is - 40 ? c to +85 ? c. 1) oip3 is measured wit h two tones at an output power of +4 dbm/tone separated by 1 mhz. 2) s11, s22 (max) is the worst value within the frequency band. 3) switching time means the time that takes for output power to get stabilized to its final level after switching dc voltage f rom 0 v to v s . pin number function 2 rf in 5 rf out 6 v s other s ground ou t line drawing (unit: mm) s 21 = 19.6 db@1960 mhz = 19.4 db@1975 mhz nf of 0.65 db over frequency unconditionally stable single 5 v supply high oip3@low current note: 1. the numbe r and size of ground via holes in a circuit board is critical for thermal rf grounding consider a tions. 2. we recommend that the ground via holes be placed on the bottom of all ground pins for better rf and thermal performance, as shown in the dra w ing at th e left side. (recommended footprint) aln1967t2 asb inc. (top view) (bottom view) ? 0.4 plated thru holes to ground plane plerow (side view) solder stencil area c o u pl er website: www.asb.co.kr e - mail: sales@asb.co.kr tel: (82) 42 - 528 - 722 3 f ax : (82) 42 - 528 - 7222 more infor m a tion c o u pl er c o u pl er c o u pl er c o u pl er 2 - stage single type specifications (in pr o duction) typ.@t = 25 ? c, v s = 5 v, freq. = 1967.5 mhz, z o.sys = 50 ohms feature s description
2 / 3 www.asb.co.kr aug ust 2011 p lerow tm aln1967t2 internally matched lna module s - param e ters noise figure oip3 p1db 1960 ~ 1975 mhz +5 v typical performance (measured) s - parameters & k fa c tor 1960.0 1962.5 1965.0 1967.5 1970.0 1972.5 1975.0 -60 -50 -40 -30 -20 -10 0 10 20 30 40 12 13 14 15 16 17 18 19 20 21 22 s12 s11 s22 s21 s21 (db) s11, s22, s12 (db) frequency (mhz) 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 -60 -50 -40 -30 -20 -10 0 10 20 30 40 0 1 2 3 4 5 6 7 8 9 10 s12 s11 s22 s21 s - parameter (db) frequency (mhz) stability factor k
3 / 3 www.asb.co.kr aug ust 2011 p lerow tm aln1967t2 internally matched lna module 1) the tantal or mlc (multi layer ceramic) capacitor is optional and for bypassing the ac noise introduced from the dc supply. the capacitance value may be determined by customer s dc supply status . the c a- pacitor should be placed as close as possible to v s pin and be connected directly to the ground plane for the best electrical perform ance . 2) dc blocking capacitors are always necessarily placed at the input and output port for allowing only the rf signal to pass and blocking the dc component in the signal. the dc blocking capacitors are inclu d- ed inside the aln module. therefore, c1 & c2 c apacitors may not be necessary, but can be added just in case that the customer wants. the value of c1 & c2 is determined by considering the application fr e- quency. application circuit recommended soldering reflow process 20~40 sec 260 ? c 200 ? c 150 ? c 60~180 sec ramp - up (3 ? c/sec) ramp - down (6 ? c/sec) + - aln out in c1 c2 v s tantal or mlc (multi layer c e ramic) c a pacitor in out vs size 25x25 mm (for aln - at, bt, t series C 10x10 mm) evaluation board layout


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